Effects of Interface Donor Trap States on Isolation Properties of Detectors Operating at High-Luminosity LHC

The very high radiation fluences expected at the high-luminosity large hadron collider (LHC) impose new challenges in terms of design of radiation resistant silicon detectors. The choice to use p-type substrates to improve the charge collection efficiency involves an optimization of the strip isolation to interrupt the inversion layer between the n± implants, limiting the breakdown voltage. To this purpose, TCAD modeling and simulation schemes, already developed and validated at typical LHC fluences have to be adapted to take into account effects usually neglected at lower fluences. To better understand in a comprehensive framework, the complex and articulated phenomena related to bulk and surface radiation damage, measurements on test structures and sensors, as well as TCAD simulations related to bulk, surface and interface effects, have been carried out. In particular, we have studied the properties of the SiO
₂
layer and of the Si-SiO
₂
interface, using MOS capacitors and gate-controlled diodes (gated diodes) manufactured by different vendors on a high-resistivity p-type silicon before and after irradiation with X-rays in the range from 50 krad to 10 Mrad. In this paper, we present the results of the experimental characterizations as well as the simulation findings, in order to analyze the effects of the interface traps on the strip isolation. This analysis helps us to validate the model and to identify the most sensitive technological and design parameters to be optimized for the design of advanced 2-D and 3-D silicon radiation detectors.