Impedance Emulation for Voltage Harmonic Compensation in PWM Stand-Alone Inverters

This paper proposes a selective voltage harmonic compensation strategy for stand-alone inverters. The use of LC output filters makes it possible to reduce switching harmonics at the output terminals of the inverter; however, it also produces voltage distortion when feeding nonlinear loads due to the harmonic voltage drop across the filter inductances. To compensate the voltage harmonic distortion and produce sinusoidal voltage, it is proposed to add virtual impedances to the fundamental voltage control. The whole process and considerations for the impedance design are described and a stability analysis of the system is presented. Finally, simulations and experimental results are shown to confirm the good performance of the proposed strategy under both steady state and load steps.