A Highly Compact and Efficient Interrogation Controller Based on FPGA for Fiber-Optic Sensor Array Using Interferometric TDM

We demonstrate a highly compact and efficient design of an interrogation controller based on FPGA for TDM sensor array. The interrogation controller precisely and adaptively synchronizes the round trip time for each sensor by introducing an extra adjustable delay and fastly retrieves the measurand induced phase signals throughout real-time phase calculation and phase unwrapping. A four-sensor array is experimentally built and interrogated by the controller to evaluate the performance as proof-of-principle. Test results validate the efficient functionality of the controller. The interrogation controller design, which consumes 8867/85200 (11%) ALUTs, 7920/85200 (9%) registers and 47/896 (6%) DSP 18-bit elements on a Stratix-III FPGA per TDM channel, greatly reduces the overall cost which is a central consideration for large-scale sensor array applications.