An analytical approach for estimation of single event transients

Transient faults are a matter of increasing concern as advanced technologies scales to smaller and smaller feature technologies. Transient errors are random faults of the hardware, which also called as soft errors. Single Event Transients (SETs) are major part of the error events which will continue to grow in the next technology nodes and affect the system functionality. Varieties of electronic products are coming into market and most of them are incorporated with large memory components, which will lead to an increase in error rates. This paper presents a very fast and accurate technique to estimate the soft error rate of digital circuits in the occurrence of Single Event Transients (SETs). Analytical approach is implemented in the proposed method to estimate the total failure rate probability along different paths in a design which includes node error rate and error propagation error rate. Paper computed the probability that a hit at any gate has an impact in the desired function of the model and is implemented using path construction, topological sorting and propagation rules. Experiment on a circuit and comparison of the results with cube based error propagation probability(EPP) analysis showed that the proposed method shows more accurate evaluation in error rate estimation of a designed model. Implementation of the proposed system helps the designers to examine the gate-level designs and also provide detailed individual contribution of each gate that are vulnerable to soft errors.