A versatile hardware platform for the development and characterization of IoT sensor networks

We present an FPGA hardware platform for the prototyping and analysis of ultra-low power IoT sensor networks. The platform is meant to address the problem of evaluating network topology design options for IoT sensor communications using single-channel communication protocols. The network topologies include bus, star, ring, and tree topologies. This FPGA-based IoT network platform is based on three fundamental ingredients: a full HDL implementation of the ultra-low power TI MSP430 microcontroller, a novel ultra-low power single-wire communication protocol that does not require any clock and data recovery, and embedded C implementation of the transceivers within the TI MSP430 without any need for external hardware circuitry. In one of our bus network analysis, we have used the Virtex-7 FPGA environment to instantiate the TI MSP430 a number of times equal to the number of IoT sensors and used simple sensor ID's to implement high-throughput, ultra-low power network communication between the IoT sensors using embedded C programs. Message collision is avoided using the built-in properties of the CDR-less protocol. The platform is flexible in that it allows the design, analysis and comparison of various networking graph topologies among the IoT sensors, including ones that contain gateways and hubs. The platform is also scalable in that the resources used for a two-sensor, point-to-point communication link is less than 1% of the Virtex-7 available hardware.