New write operation scheme for alleviating effect of line resistance on RRAM crossbar array

Crossbar is the basic structure for RRAM massive applications, while as the increase of integration level and density of RRAM crossbar array, the line resistance is becoming the key problem, which affects the write and read operation of the device in array. Based on RRAM 1D-1R(1-diode 1-resistor) structure with V/3 bias scheme, this paper analyzes the line resistance problem and puts forward a new write voltage scheme for write operation: voltage source coefficient adjusting scheme. The functionality of the proposed bias scheme is verified by numerical simulation in Matlab and LTSpice on the case of 32×32 1D-1R crossbar array.