Synchronization and control of multi-threads for MPEG-4 video decoder

The implementation of the MPEG-4 video decoder can have many approaches. Because of the multiple functionalities offered by the MPEG-4 video decoder, the use of a programmable chip could be a better solution for many applications. For practical reasons, a multiprocessor chip or, sometimes, multiple programmable chips are often preferred for implementation of the MPEG-4 video decoder. We discuss the partition of the MPEG-4 video decoder into multiple tasks and mapping these tasks to a multiprocessor architecture. The issues of inter-processor communication and control, and synchronization of multi-threads are also addressed.