Wide band programmable true time delay block for phased array antenna applications

This paper describes a 6-bit programmable True Time Delay (TTD) system for 1-12GHz applications. The minimum delay resolution is 20ps, and maximum delay is 1.35ns, thus making it suitable for phased array antenna and imaging applications. The programmable TTD system simulation results show better than 9dB of input and output return loss across the entire frequency range. As a proof of concept, a 40ps unit cell delay is realized in the GlobalFoundries (GF) 180nm CMOS technology. The fabricated unit cell has less than 2.5dB insertion loss and better than 9dB return loss within the entire frequency range. The fabricated TTD unit cell occupies 0.3 X 0.35mm
²
.