Hardware implementation of spatially coupled LDPC codes for broadcasting

NHK (Japan Broadcasting Corporation) is conducting research on the next generation of digital terrestrial broadcasting system to enable large-volume content services such as UHDTV (ultra-high-definition television). In our previous study, we proposed spatially coupled low density parity check (SC-LDPC) codes for broadcasting. The lengths of these codes can be easily extended and are expected to have good performance. If SC-LDPC codes are implemented in hardware, it is necessary to reduce the decoding calculation complexity and the hardware volume. This paper reports a parameter optimization for the decoding process and log likelihood ratio (LLR) quantization. Offset min-sum decoding was used in order to reduce the calculation complexity while maintaining performance, and the offset value was optimized in a computer simulation. The quantization bit depth of LLR was also determined with a computer simulation. The results were incorporated in the hardware implementation of the SC-LDPC codes, and a laboratory experiment was conducted with a prototype modulator and demodulator for broadcasting. The BER performances measured in the laboratory experiment and computer simulation were compared, and the relative deterioration of the hardware implementation was under 0.1 dB.