Digital controller design for three phase active power filter for harmonic and reactive power compensation using FPGA and system generator

The harmonics and the reactive power is a major concern in power distribution system. The extensive use of the non-linear loads in the present context as computers, SMPS, Rectifiers etc. give rise to harmonics and reactive power in the power system. These will cause a large undesirable effects like equipment heating, damaging devices etc. To compensate harmonics and reactive power, active power filter (APF) is widely used. This paper presents a three-phase APF for power line conditioning (PLC) system to improve the power quality in the point of common coupling (PCC). It also consists of a controller to control the APF. The hysteresis current controller (HCC) is used to generate the switching pulses for the voltage source inverter. VHDL is used to design a digital controller as it is independent of process technology. To generate the reference current synchronous reference frame (SRF) theory is used. The PI current algorithm (using FSM+DA TAPA TH) and the HCC are designed using VHDL codes and implemented on FPGA for hardware. The three phase APF is modeled, tested and investigated under different unbalanced non linear conditions using MATLAB/SIMULINK environment. The simulation results justify that the APF is compensating the harmonics and reactive power at the PCC. The APF system is in compliance with IEEE 519 and IEC 61000-3 recommended harmonic standards.