Design optimization of a practical ESD protection circuit by CAD: a case study

This paper reports design optimization of a practical ESD protection circuit by ESD simulation. A compact ESD protection structure was designed for a transceiver chip. Chip malfunction was observed in tests. ESD simulation and measurement measures showed the malfunction was caused by large substrate current induced early-triggering of the ESD devices. Solutions were provided to optimize the chip. It shows that ESD simulation is a powerful means in conducting practical ESD protection designs.