Fabrication issues for multiple layers of SOI MOSFET devices

Two basic concerns for the fabrication of multiple layers of SOI (MLSOI) devices, namely, thermal budget and SOI island thickness are discussed in this paper. To electrically characterize the dopant lateral diffusion in thin SOI films, a lateral N+ N N+ test structure was designed and simulated using TSUPREM-4 and MEDICI to investigate and measure the lateral diffusion in the SOI films. Simulation shows that the dopant profile in the thin SOI film is nice, straight and perpendicular to the silicon and SiO/sub 2/ interface. The SOI film thickness of small sized islands can be determined by employing a simple Transmission Line Model (TLM) structure.