Simulation-enabled development lot journey smoothening in a fully-utilised semiconductor manufacturing line

Technology and product development have high priority in an advanced semiconductor manufacturing facility such as the Infineon Dresden fab. From the perspective of line performance this means that short cycle times for development lots have to be guaranteed to enable the required learning cycles. Long-term simulation is used in dynamic capacity planning to find a compromise between short cycle times for the development corridor and high utilisation of the installed tool capacity. All products in the fab run with customer-specific due dates. As such, negative side-effects caused by the accelerated development lot corridor through increased dispatch priorities have to be minimised. In turn, for day-to-day operations short-term simulation is used for early detection of bottleneck situations and other sudden resource availability problems. With focus on the development corridor, a Lot Cycle Time Forecaster was realised. The aforementioned manifold applications of discrete-event simulation are described in this paper in more detail.