Convolution-Based Fast Thermal Model for 3-D-ICs: Transient Experimental Validation

In this paper, the transient experimental validation of the convolution-based fast thermal model (FTM) for 3-D integrated circuits is presented. The methodology is proven to be applicable to analyze the temperature evolution of real devices. A low-power package configuration with two different power dissipation scenarios, hotspot (HS) in the corner and HS in the center of the active region, has been considered for the validation. In this way, the importance of the package thermal impact on the definition of the final temperature profiles is highlighted. The error between the measurement and the FTM results remains always below 2.3 °C/W. Moreover, the model has been validated with respect to case studies concerning duty cycles of different durations. This proves the applicability of the model in defining the allowed duration of the chip activity before a maximum threshold temperature is reached. Finally, in this paper, the possibility to use a variable time-step approach in the transient FTM is presented together with the option of computing the temperature in individual points only. This is possible maintaining the same accuracy as if the fully resolved temperature maps would be calculated.