A hybrid CMOS-imager with perovskites as photoactive layer

A new complementary metal-oxide-semiconductor (CMOS) compatible hybrid CMOS image sensor (CIS) are proposed to enhance pixel fill factor, without increasing fabrication cost and process complexity. In this work, the perovskites(PVSK) is first time proposed to be integrated as pixel photon sensitive layer of CIS supplied with low voltage bias. The thin PVSK layer is vertically deposited on the top of signal read-out circuit which fabricated with 0.18 μm CMOS standard process. We propose the planar type pixel structure design, which has advantages to enhance the high pixel fill factor, and easy integrated with standard CMOS process. For integration process verification and device characterization, the dummy chip of planar type pixel photodetectors was fabricated by e-beam lithography. The on/off ratio of the PVSK photodetector was reached to 875 at 2.5V bias condition under 0.29 mw/cm
²
irradiation. Furthermore, we presented the fully-CMOS compatible hybrid CIS with array pixel size 40×40 μm
²
integrated with the readout pixel circuit.