Design and implementation of embedded DAQ using spatial parallelism on FPGA for better throughput

Data acquisition (DAQ) is the process of acquire analog signals from different types of sources and further process the acquired signals through personal computer (PC) in digital form. Compared to traditional measurement system, PC-based DAQ system provides a more flexible and cost-effective measurement solution to the industry and utilizes the efficiency, processing power and connectivity capabilities of industry-standard computers. Nowadays, the electronic based industry is becoming more advanced with the recent technologies used in implementing their design and product. Therefore, the requirement of DAQ system has to be increased in terms of flexibility, accuracy and reliability. In the past development of such DAQ systems have been seen that are not competency in terms of data accuracy and system throughput. On the other hand, the main processing unit which is to gather, process and generate the output data is work sequentially which might be results in lack of efficiency and flexibility. In this paper, a new embedded DAQ unit using spatial parallelism on Field Programmable Gate Array (FPGA) which produced high accuracy and throughput was designed and implemented using DE0-Nano FPGA board. Up to 7 input channels will be processed concurrently through spatial parallelism and focused on its data accuracy and system throughput. Furthermore, in order to achieve a higher processing speed and increase the data accuracy, the overall system design reached 1GHz operating frequency.