An experimental setup of stacked thermal chips with selectable cell heaters for 3D integration design

This paper introduces a unique experimental setup of stacked thermal chips consisting of 100 polysilicon heaters in a 30 mm by 30 mm area. Temperature distributions in the stacked chips were measured and characterized with varying power in the heaters at a range exceeding 300 W in total; then thermal simulation models were built for 3D integration design.