A 2 GHz low noise amplifier with transformer input matching in 28 nm CMOS

To create a fully integrated very low noise amplifier in CMOS technology without excessive power consumption, it is advantageous to combine the benefits of using a highly scaled technology and integrated coils. The low noise amplifier using a feedback transformer for simultaneous noise and impedance matching presented in this paper shows the successful conjunction of these benefits. However the challenge of fitting a simplified transistor model to an aggressively scaled CMOS device combined with analytical calculation of the circuit input impedance requires the development of an enhanced small signal model to analyze the circuit input impedance. The amplifier was integrated in a 28 nm CMOS technology and exhibits a voltage gain of 24 dB with a measured noise figure of 1.9 dB at 2 GHz whereas the current consumption is 5 mA from a 1V low voltage supply. The input return loss is better than −20 dB. The third order intermodulation input intercept point is −6 dBm while the 1 dB-input referred compression point is −17 dBm. Only 0.26 mm
²
of die area are consumed excluding the pads.