Signal integrity analysis of serpentine traces in IC packages

Skew matching in high speed interfaces is achieved through the use of serpentine structures both in the board and in the package substrate. The basic assumption is that length matching through the use of the serpentine structures will enable delay skew matching. In this paper, we have studied serpentine structures in strip-lines to check the validity of this assumption. Some of the critical parameters considered while designing the serpentine structure includes the serpentine line length, line width, spacing, number of bends, types of bends. Asymmetric feed lines and split bends are also studied. This paper provides an analysis of the insertion loss, return loss, coupling and time delay of strip-line structures using 3D FEM tool and circuit solvers, the time delay calculation has been investigated. The results indicate that signal delay in a serpentine trace is a function of serpentine line length, line width, spacing between serpentine segments, number of bends and the angle of the bends.