Timing modeling methodology for a power MOSFET

This paper presents a methodology for determining the parameters needed for a simplified LEVEL 1 SPICE MOSFET model for an accurate modeling of the switching times. The input of the methodology is represented by the information that can be found in almost every switch datasheet, while the outcome of the proposed methodology consists of the values needed for building a first level SPICE MOSFET model. This paper offers an example on how to apply the proposed methodology for a NMOS transistor used in a high-side configuration. However, the methodology can be applied for both NMOS and PMOS transistors used in high-side and/or low-side configurations. Moreover different gate charging/discharging current profiles can be considered when determining the SPICE model parameters.