Measurements and analyses of substrate noise waveform in mixed signal IC environment

A transition controllable noise source is developed in a 0.4 /spl mu/m CMOS, P-substrate N-well technology, for experimental studies on substrate noise properties in a mixed signal IC environment. The number of active logic elements, transition directions, and delays can be controlled. Measured substrate noise waveforms with 100 ps time resolution show that peaks in substrate voltage, reflecting logic transition frequencies, have a time constant a few times larger than the switching time. Analyses with equivalent circuits make it clear that this process results from charge transfer between parasitic capacitance of entire logic circuits and an external supply, through supply/return parasitic impedance.