A temperature-dependent DC model for quarter-micron LDD pMOSFET's operating in a Bi-MOS structure

A temperature-dependent analytical model for deep submicrometer LDD p-channel devices operating in a Bi-MOS structure is reported for the first time. This model is based on experimental data obtained from 0.25-/spl mu/m process wafers with a wide range of technologies (0.25-1.0 /spl mu/m). The measurements have been performed within the temperature range 223-398 K (-50/spl deg/C to +125/spl deg/C). The model accounts for the effects of independently biasing the source, drain, gate and body potentials, scaling, and the influence of temperature on the threshold voltage and the device currents. The effect of temperature on the device transconductance and the output conductance have also been examined. The results revealed that close agreement between the analytical model and the experimental has been achieved. Comparisons between the principal MOS current and the lateral bipolar current have been made to demonstrate the improvement of the latter with temperature for the quarter-micron devices.