Test set embedding based on width compression for mixed-mode BIST

We present a new test generator circuit (TGC) for mixed-mode built-in self-test (BIST) that embeds a precomputed deterministic test set T/sub D/ in a longer sequence. The design method employs width compression based on the property of d-compatibles. To demonstrate the feasibility of the TGC design method, we present experimental data for single stuck-at test sets for the ISCAS 85 circuits and full-scan versions of the ISCAS 89 benchmark circuits. We also achieve significant improvement over another recently-proposed mixed-mode TGC design scheme for BIST.