Design of low power content addressable memory using charge sharing Master Slave Match Line

In this paper, Master Slave Match Line (MSML) design is adopted in conventional Content addressable memory (CAM) cell. The main objective of this design is to achieve Low power and high speed. MSML consists of two Master Match Line (MML) and two Slave Match Line (SML). The Circuit was implemented using Microwind tool in 45nm technology. Performance metrics such as power is compared with existing CAM designs like conventional CAM, NAND type CAM cell, NOR type CAM cell. Average Power consumption of the proposed design is found to be 36.944μW at 45nm for 1V. Delay in the signal propagation is measured as 0.011ns for 45nm technology. Proposed design achieves less power and high searching process than the conventional CAM cell.