A single-inductor-cascaded-stage topology for high conversion ratio boost regulator

A single-inductor-cascaded-stage boost regulator topology is presented that time-multiplexes a single inductor using one-nFET-two-pFET power stage and a bias-gated Pulse-Frequency Modulation controller to achieve high conversion ratio. A test-chip in 130nm CMOS demonstrates 120× conversion using a single inductor while consuming 140nA bias current.