Low power CAM design using modified SCN based classifier

A Content Addressable Memory is a memory unit which compares input search data against a table of stored data and returns the address of the matching data which is retrieved within single clock cycle. The CAM consumes more power due to parallel search operation and the designing issues of the CAM are to reduce the power consumption, area and to improve performance. The proposed architecture is based on a recently developed sparse clustered network which eliminates most of the parallel comparisons performed during a search operation. In order to reduce power in search operation NAND type CAM is used in which the CAM cell is XNOR type. For best search performance the NOR type CAM is used which is XOR type. Today the challenging issue is to reduce area and power consumption in CAM. The existing CAM cell is made of 10T and 9T. In this paper we are designing 4T CAM cells which have low power and high performance.