Recent experience with fault diagnosis for analog circuit boards using component failure fimulation

Results of a study aimed at reducing fault isolation time in the analog portion of hybrid circuits and developing a meth odology for automatic test program gener ation (ATPG) are presented. Available circuit analysis programs were tested for suitability for ATPG. SYSCAP, after some modifications to improve convergence, satisfied our requirements quite well. By means of a separate computer program, fault isolation charts were prepared based on SYSCAP nominal, worst-case, and compo nent failure simulation. Experience with these charts proved them to be reliable and accurate. The study concludes that the earlier in the circuit design, manu facturing, and testing process such an analysis is applied the greater the benefits.