Controlled silicon thinning for design debug of C4 packaged ICs

Design debug through circuit modification on flip chip packaged ICs requires controlled thinning of substrate silicon. A laser-based tool and methodology for rapid controlled removal of silicon is described. This etching process uses a focused laser beam for localized melting of silicon in a chlorine atmosphere. At the high temperatures produced by the laser heating, chlorine reacts with silicon and forms volatile SiCl/sub 4/, which is gaseous. A novel method based on optical beam induced current (OBIC) was implemented for determining in situ endpoint for this backside thinning process. Specifics with respect to both the origin and magnitude of the OBIC signal are presented along with a model which relates the OBIC signal to the remaining silicon thickness. Details of the implementation of the endpoint signal are discussed. Through use of this methodology, controlled silicon thinning is successfully demonstrated where a localized Si area on an IC was thinned down to 15 /spl mu/m of silicon. The paper also addresses concerns regarding trench planarity and surface roughness. Furthermore, the paper describes an implementation of OBIC endpoint detection on a commercially available focused ion beam (FIB) tool, specifically designed for use with flip-chip packaged ICs. This allows for controlled silicon etching in preparing the trench floor for subsequent FIB processing such as milling to internal nodes. A discussion regarding the performance of the FIB OBIC implementation and results are also presented.