Carbon nanotube field-effect transistor performance in the scope of the 2026 ITRS requirements

Top gate, global back gate and buried gate CNTFET structures with a channel length of 5.9 nm are studied in the scope of the 2026 ITRS requirements. The studies are performed using a numerical device simulator. Figures of merit and performance parameters such as the switching speed, the switching energy, I
_on
/I
_off
-ratio, among others, are obtained for each structure and compared with the 2026 ITRS requirements for different application scenarios. Most of the requirements are met with the buried gate CNTFET. The requirement for the I
_on
/I
_off
-ratio is met at the cost of other performance parameters.