Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation

A 32-bit icyflex2 processor operating over a wide supply range (WSR) is presented, showing a very low energy consumption in comparison to other state-of-art 32-bit processors. Operating under very different supply conditions involves tremendous differences in operating frequency, and a large sensitivity to process and temperature variations at low-voltage, which both tend to complicate timing closure. In this paper, WSR is achieved on the one hand thanks to standard cells, RAM, ROM and level shifters optimized for sub-threshold operation and for low-leakage, and on the other hand thanks to a latch-based design methodology, which simplifies the timing closure in fast corners, while focusing on setup optimization in slow corners. Results are reported for the integration of this sub-threshold latch-based 32-bit icyflex2 processor in EM Microelectronic Marin ALP CMOS 180 nm technology showing full functionality for supply voltage ranging from 0.37 V (i.e. sub-threshold operation) to 1.8 V (i.e super-threshold operation), over 5 process corners and for temperatures between −25 and 75°C. The Minimum Energy Point (MEP), where the circuit operates at the highest energy efficiency, occurs at sub-threshold voltages, reaching an energy per operation as low as 17.1 pJ/cycle at 19 kHz and 0.37 V. The energy per operation rises to 119.3 pJ/cycle at 1.1 V and 10 MHz, almost 7 times higher than at the MEP, demonstrating the clear advantage of sub-threshold operation in terms of energy. This possibility to maintain continuous full functionality of the design by adapting the operation frequency and varying the supply voltage makes that design a perfect candidate for adaptive dynamic voltage frequency scaling (ADVFS).