Investigation of reverse recovery effects on the SOA of integrated high frequency power transistors

Switching frequency and switching losses are the dominating factors in power conversion applications. These factors can be controlled at technology development or at IC design with different trade-offs. In this paper we introduce a technique to measure safe operating area (SOA) under high frequency switching conditions - primarily, when the power LDMOS body diode is undergoing reverse-recovery. We show that this new SOA is more conservative than the electrical SOA and defines a diminished boundary for high frequency and high reverse injection operations. With this technique we look at the impact on specific design parameters in commonly used LDMOS topologies in an advanced BCD technology. Furthermore with the help of numerical simulations and careful metrological observations we discuss the phenomena leading to device performance limits useful for IC and device designers. Failure analysis of devices at product level and controlled failures created in standalone devices at wafer-level are examined.