A Novel Programmable On-chip Voltage Droop Detector for FPGA Applications

Voltage supply noise can impact circuit system performance and functionality. FPGA (Field Programmable Gate Arrays) applications vary from different usage model, the detection of supply noise is crucial for these applications. Detection sensitivity is directly related to detector stage delay. This paper discusses the detector stage delay versus sensitivity relationship. It also demonstrates a novel technique to improve the detector stage delay by interpolations. An implementation example of time digital converter using the original method and the interpolation method in FPGA fabric is also demonstrated and compared.