An ultra low power operated logic NVM for passive UHF RFID tag applications

An electrically programmable and erasable memory macro with low power and low voltage operation is implemented for the applications of RFID and NFC. The memory macro with single-poly NVM cell structure fabricated in 0.11μm generic CMOS logic process is proposed and characterized. With unique device and circuitry designs, silicon results demonstrate the write operation with power consumption less than 23μW. In addition, the read operation can be achieved with power consumption less than 3μW at 1MHz access speed and the read voltage down to 0.56V.