A 32 × 32 BIT multiplier using multiple-valued MOS current-mode circuits

In the conventional array multiplier, the multiplication speed is restricted by the carry propagation. On the other hand, it is difficult to realize a compact multiplier in the high-speed multiplier such as the Wallace tree multiplier, because its layout is complicated and a large area is required for the interconnections. In such situations, the use of multiple-valued logic in conventional digital systems has potential advantages of which one of the most important is the reduction in interconnections [1]. However very few types of chips using multiple-valued logic have been fabricated for practical applications[2]. This paper presents a high-speed compact multiplier based on the radix-4 signed-digit (SD) number system and a completely new implementation using multiple-valued MOS current-mode circuits[3].