An experimental large capacity semiconductor file memory using 16-levels/cell storage

In recent years, high density and high speed file memories have become increasingly important for achieving higher performance in computer systems. Multilevel storage dynamic memories offer advantages in terms of speed and density for file usage. An experimental 4Mbit memory has been designed and fabricated utilizing a newly developed multilevel storage scheme and unique peripheral circuits. These include a staircase pulse generator for multilevel storage operation, a voltage regulator for maintaining storage level accuracy, an error correcting circuit for protecting the data from alpha-particle-induced soft error, and a timing generator for testing the device as a fully integrated LSI memory.