Measurement Bias from Address Aliasing

In this paper, we identify address aliasing as an important underlying mechanism causing measurement bias on modern Intel microarchitectures. By analyzing hardware performance counters, we show how bias arises from two external factors:size of environment variables, and characteristics of dynamically linked heap allocators. We demonstrate ways to deal with this type of bias, through runtime detection and correction of aliasing conditions. For heap allocators, we show that common implementations tend to give worst case alignment by default, favoring page alignment for large allocations. The performance impact of aliased memory accesses can be significant, causing up to a 2x performance degradation in already optimized code. Our results can enable new optimization strategies to account for this phenomenon.