High-speed smoothing filter in the Residue Number System

In this paper we propose a new architecture of a smoothing filter in the RNS. The problem of computationally complex division operation performing is solved by replacing this operation by division with the remainder. This makes it possible to replace the division by subtraction and a multiplication in the RNS when using RNS modulo as a divisor. Simulation of smoothing filter hardware implementation showed an 12,5% increase the processing speed by using the proposed architecture in comparison with smoothing filter functioning in BNS and 46,7% increase the processing speed in comparison with known smoothing filter architecture in RNS. Besides, hardware costs for the implementation of the proposed architecture on average 25% less in comparison with known smoothing filter architecture in RNS.