Comparing Composite vs. Wave-Cores in a novel dark-silicon methodology

As transistor scaling continues to push us into new design spaces, where power density is increasingly a major performance constraint, there have been moves to explore solutions which exploit so-called Dark Silicon, the UCSD Greendroid project being a notable exemplar. In this paper, we explore one novel dark silicon methodology, based on a heterogeneous multi-accelerator system model and an implicit execution model for the host processor. We also highlight a back-end translation methodology from raw machine code into data-flow style hardware cores, and introduce two distinct implementation styles. We then demonstrate comparative power benefits as compared to a relevant CPU model, assuming a 65nm benchmark technology node for both cases.