Implementation of asynchronous pipeline using Transmission Gate logic

In the given scenario of computer architecture, there is a growing importance of pipeline structures. The need of the hour is to implement these pipelines more efficiently that is basically reducing their area overhead and dynamic power dissipation. Recent developments in the logic families have led to opening a portal to vast research areas in this field. In this paper we try to implement Sutherland Pipeline, a static asynchronous pipeline using transmission gate logic family.