Visible and nonvisible defects in 3DIC flows

This paper describe the detection of visible and non-visible defects in 3DIC flows. These new flows have process modules that have been used before in CMOS wafer fabrication. There are opportunities to create latent defects such as via voids or thin insulating films that need to be managed. The ideal approach is 100% electrical test but unfortunately that is not cost effective. Management of these defects using inspections, with the inherent risks due to sampling, and low yield analysis feedback is required. This paper describes the use of traditional optical inspection, fluorescent inspection, acoustic metrology and data analysis to manage these defects.