Implementation analysis of HEVC encoding on dual ARM Cortex A15 architecture

Currently, High Efficiency Video Coding (HEVC), is the new video compression standard published since 2013. The intention of HEVC is to optimize the coding efficiency. Then in order to achieve a high quality material and/or software implementation of this new standard, it is first necessary to analyze and to understand its complexity and its major functionalities. This paper attempts to point and to identify the more complex functions and aspects from a profiling analysis of the reference software matrix HM, performed on the IGEPv5 board.