Pareto front analog layout placement using Satisfiability Modulo Theories

This paper presents an analog layout placement tool with emphasis on Pareto front generation. In order to handle the exploding number of analog physical constraints, a new approach based on the use of a Satisfiability Modulo Theories (SMT) solver is suggested. SMT is an area concerned with checking the satisfiability of logical formulas over one or more theories. SMT is usually well-tuned to solve specific problems. To our knowledge, this is the first effort to use SMT to tackle analog placement. The proposed tool implicitly generates multiple layouts that fulfill the given constraints. Therefore, it gives the user the option to choose from the feasible solutions through specifying an aspect ratio or by selecting the optimum solution from the Pareto front of the generated shape function. In contrast to most of the existing techniques, as the number of physical constraints increases the SMT solver processing time decreases. The proposed system yielded layouts with a competitive area and run time compared to other techniques.