Ground design for crosstalk mitigation in a WL-CSP transceiver for mobile communications

This paper presents the methodology for redistribution layer (RDL) design of a communication Coherent Receiver block. The analysis focuses on the dual-input traces of the receiver for crosstalk mitigation between this block and a local aggressor. Interaction between Die/Package/Test-board is also discussed. Full-wave simulations show excellent correlation in electrical performance up to 6GHz. The measured trace-to-trace isolation for the integrated solution is reported to be close to −40dB at 2.7 GHz.