High-Performance Plasmonic THz Detector Based on Asymmetric FET With Vertically Integrated Antenna in CMOS Technology

We report a high-performance plasmonic terahertz (THz) detector based on an antenna-coupled asymmetric FET by using the 65-nm CMOS technology. By designing an asymmetric FET on a self-aligned poly-Si gate structure, more enhanced channel charge asymmetry between the source and the drain has been obtained in comparison with the nonself-aligned metal gate structure of our previous paper. In addition, using a vertically integrated patch antenna, which is designed for a 0.2-THz resonance frequency, we demonstrated the highly enhanced detection performance with a responsivity of 1.5 kV/W and a noise-equivalent power of 15 pW/Hz
^0.5
at 0.2 THz.