Bilayer silicon oxide and silicon nitride thickness OOS elimination

In plasma enhanced chemical vapor deposition process, RF power is one of the dominant factors affecting the film deposition rate. The efficiency of RF power coupling is decided by the RF circuit, the plasma and the substrate. In this paper, we studied how the substrate electrical conductivity affects the RF power coupling efficiency and PECVD film deposition rate. For high resistivity wafers, wafer backside edge metallization increased its electrical conductivity hence increased the RF power coupling and increased the SiO and SiN film deposition rate. This impact was more on low frequency RF power than on high frequency RF power. In this work, we demonstrated SiO and SiN thickness out of specification on the InGaN LED (light emitting diodes) wafers was eliminated by removing the wafer edge backside metallization.