Modeling XHCI in term of EHCI

The demand of greater speed in USB communication has given birth to 4th generation standard named Super Speed USB with 10 times increase in the data rate compared to High Speed USB. Super speed USB introduces a variety of features that improve performance, reduce system power consumption and extend functionality. In order to support all these enhanced features afforded by USB3 specifications, a new generation of host controller is required. The implementation of this host controller standard is described in hardware by XHCI (Extensive host controller interface) which is quite complex and different from previous generations with its difficult terminology and modeling. In order to handle this controller, indepth understanding of each data structure is required. This paper attempts to create an analogy between the phenomenon of XHCI and its previous generation candidate, EHCI, by analyzing their data structures and operational models. This analysis will help in comprehending the programming model of XHCI quite easily and will reduce the USB system development cycle time.