A 0.11mm⁁2 150mW 10GBase-T transmitter in 28nm CMOS process

The presented IEEE802.3an 10GBASE-T transmitter utilized a current-steering DAC and low voltage line driver to achieve the low power requirement. A self-regulated amplifier is used to enhance the operating bandwidth without common mode feedback stability limitation. By using a non-cascode current driver, the center-tap voltage can be lowered to 1. 6 V so that power consumption can be reduced dramatically. The design achieves TX SFDR > 60dB with 2Vppd swing across 400 MHz band and 150mW power consumption. The transmitter is implemented in a 28nm CMOS process with 1.8V/ 1V power domain and occupies an area of 0.11 mm
²
.