High voltage resistant ESD protection circuitry for 0.5 /spl mu/m CMOS OTP/EPROM programming pin

This work introduces new high voltage resistant ESD protection circuitry for the programming pin of a nonvolatile one time programmable silicided 0.5 /spl mu/m CMOS device. TLM, HBM, and MM0.75 /spl mu/H ESD stress measurements of this new design resulted in latch-up resistant protection circuitry with an ESD performance of more than 8.0 kV HBM and 950 V MM0.75 /spl mu/H.