A design of a BPSK transmitter front end for ultra-wideband in 130nm CMOS

This paper presents a fully integrated BPSK (Binary Phase Shift Keying) Transmitter Front End for Ultra-Wideband (UWB) applications, designed in 130 nm CMOS technology. A simple architecture based on parallel pulse generator blocks in parallel is proposed to produce 9th derivative Gaussian pulses. In addition to the pulse generator, the circuit comprises a passive balun circuit, a common source amplifier, and a BPSK modulator. The transmitter has been simulated and the results demonstrated the circuit capability to operate as a front end BPSK transmitter. The proposed circuit generates output pulse envelopes of width 0.8 ns and maximum amplitude of 40 mVpp, an average power consumption of 1.9 μW/pulse and energy of 1.6 fJ/pulse when fed with a 715 MHz clock and 100 MHz data sources. The whole circuit occupies 480x320 um2 (without pads). This pulse generator complies with FCC UWB spectral power mask.)