Symbolic network analysis methods for practical analog integrated circuits: a survey

A comparative study of symbolic network analysis methods for analog integrated circuits of practical size is presented. The methods are compared with respect to two important criteria: (1) the running time limits of the different algorithms used within every method and (2) the number of terms that are generated needlessly; i.e., generated invalid terms and cancelling terms. The methods are compared for several analog integrated building blocks. The results indicate that conclusions about the efficiency of the different symbolic analysis methods based upon comparisons for small circuits, can be misleading. The study also allows the reader to make a good choice for a symbolic analysis method as the core routine of a modern symbolic analyzer with symbolic simplification capabilities.